Prepare for normal operation
* use DSI HS clock (300mhz assumed)
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parent
068c5ac881
commit
7e0409fff6
18
dsi85_main.c
18
dsi85_main.c
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@ -28,8 +28,8 @@ const struct _cfg_reg
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{0x0D, 0x00}, // pll disable
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{0x09, 0x00},
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{0x0A, 0x04},
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{0x0B, 0x02},
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{0x0A, 0x05},
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{0x0B, 0x19},
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{0x0D, 0x00},
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{0x10, 0x26},
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{0x11, 0x00},
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@ -39,16 +39,16 @@ const struct _cfg_reg
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{0x19, 0x00},
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{0x1A, 0x03},
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{0x1B, 0x00},
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{0x20, 0xc0},
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{0x21, 0x03},
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{0x20, 0x80},
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{0x21, 0x07},
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{0x22, 0x00},
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{0x23, 0x00},
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{0x24, 0x38},
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{0x25, 0x04},
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{0x24, 0x00},
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{0x25, 0x00},
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{0x26, 0x00},
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{0x27, 0x00},
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{0x28, 0x20},
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{0x29, 0x00},
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{0x28, 0xde},
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{0x29, 0x01},
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{0x2A, 0x00},
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{0x2B, 0x00},
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{0x2C, 0x8c},
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@ -67,7 +67,7 @@ const struct _cfg_reg
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{0x39, 0x00},
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{0x3A, 0x00},
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{0x3B, 0x00},
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{0x3C, 0x10},
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{0x3C, 0x00},
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{0x3D, 0x00},
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{0x3E, 0x00},
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